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NXP Semiconductors /MIMXRT1021 /IOMUXC_GPR /GPR25

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Interpret as GPR25

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LOCK_M7_APC_AC_R3_TOP_0)LOCK_M7_APC_AC_R3_TOP 0M7_APC_AC_R3_TOP

LOCK_M7_APC_AC_R3_TOP=LOCK_M7_APC_AC_R3_TOP_0

Description

GPR25 General Purpose Register

Fields

LOCK_M7_APC_AC_R3_TOP

lock M7_APC_AC_R3_TOP field for changes

0 (LOCK_M7_APC_AC_R3_TOP_0): M7_APC_AC_R3_TOP is not locked

1 (LOCK_M7_APC_AC_R3_TOP_1): M7_APC_AC_R3_TOP is locked (read access only)
M7_APC_AC_R3_TOP

Access Permission Controller (APC) start address of memory region-3

Links

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Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data